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Thinking Outside the Box for Network Acceleration

Martin Hull
by Martin Hull on Jun 1, 2022 6:00:00 AM

There is a continued push to go even “faster.” Lowering port to port latency while maintaining features and increasing link speeds and system density is a significant technology challenge for designers and the laws of physics. Since the first release of Arista’s 7100 and 7150 switch families, the company has been a partner in building best-in-class low latency trading networks that are today deployed in global financial institutions and trading locations.

Cutting edge customers took the approach of disaggregating network functions into pools of functionality – extremely fast Layer 1 switching, operating as low as 5 ns and FPGA-driven trading pipelines running at under 40 ns with the Arista 7130 family. This approach allowed more sophisticated L2 / L3 networking functionality, such as the ability to tap any flow or enable routing protocols, to run on general-purpose systems, including the Arista 7050X, 7060X and 7170 full-featured platforms, using merchant silicon with billions of packets per second and low latency.

Optimized for Market Choices

There is no perfect solution for all customers in this space that combines ultra low latency, FPGA, L2/L3 features, performance and density. Arista has remained committed to offering the choice of platforms to meet different customer needs – with extremely high density single-chip systems up to 25.6 terabits per second in the 7060X5 that can collapse multiple devices and network hops, or the cutting edge 7130 SwitchApp that implements L2 forwarding in under 90 nanoseconds and adds Layer 3 forwarding in around 130 ns! Customers can make a choice from the rich set of products on how to construct their low latency network architectures.

Introducing the Latest in the Arista 7130 Series

We challenged the Arista engineering teams to combine advanced programmable networking silicon, a large Layer 1 fabric, multiple powerful FPGAs, and a robust CPU complex into a single platform. This has never been done before, and the resulting systems offer significant benefits to the set of high performance financial trading applications.

As shown below, the Arista 7130 switches offer another option to attack end-to-end network latency by consolidating the major processing elements within compact and power efficient platforms.

7130_B_LBR_STACK

The Arista 7130LBR and 7130B Systems

Ideal for Network Architects

When every meter of fiber counts for around 5 ns of latency, network architects have to choose carefully how to construct applications and manage traffic flows to minimize the number of individual links and how many devices each packet passes through before it is fully processed.

Separating functionality into discrete tiers adds substantial round trip latency penalties with multiple devices and extra cabling. Alternatively, trying to consolidate existing network functions into FPGA-based platforms consumes precious programmable resources for standard functionality and reduces scale.

Arista 7130LBR and 7130B Delivers Feat of Engineering

A modern feat of engineering, the new 7130LBR combines a high bandwidth, Layer 1 crosspoint with high specification Xilinx FPGAs, a Broadcom Jericho2 family switch chip, as used in spine platforms, and a multi-core x86 CPU into a single comprehensive system that provides orders of magnitude improvements in end to end latency and enables efficient offloading of switching, CPU and FPGA tasks, ensuring maximum availability of resources for trading applications. It substantially reduces deployment footprints, operational complexity and overall power consumption.

The Arista 7130B is an ideal partner to the 7130LBR with up to 256 ports to scale out the network without adding incremental latency. With 32 QSFP-DD ports, the 7130B supports QSFP-DD port breakouts, each supporting 8 sub-ports for up to 256 Layer 1 ports. Not only does the 7130B offer a 256-way Layer 1 crosspoint fabric that is over 2.5x larger than the previous generation, but it also embeds a P4 programmable pipeline with the Intel Tofino silicon and a multi-core x86 CPU. Delivering port to port unparalleled latency from just 7 ns, the 7130B can interconnect up to 256 7130LBR systems, bringing together pools of in-network, high speed processing for scale out applications.

Thinking Out of the Box with the Arista 7130 Duo

Together, the new 7130LBR and 7130LB Series systems deliver unique new ways to address the scale, latency and performance challenges found in the most demanding financial networks. They will also benefit other markets and customers with large-scale custom processing needs. It is clear that thinking outside of the box to solve the customer latency requirements results in putting everything into the same box! Welcome to the new world of high performance, low latency networking!

 

References:

Opinions expressed here are the personal opinions of the original authors, not of Arista Networks. The content is provided for informational purposes only and is not meant to be an endorsement or representation by Arista Networks or any other party.

Martin Hull
Written by Martin Hull
As Vice President of Cloud and Platform Product Management, Martin Hull is responsible for the product management of the data center and routing product lines and for the cloud scale customers, as well as associated Systems Engineering and Sales teams. He has been at Arista since 2011, and has over 30 years experience of networking technology, having spent 13 years at Cisco in both Systems Engineering and Product Management roles, where he was part of the team that developed the Nexus product lines, before which he was at Unisys and Olivetti Solutions in the UK. Originally from the UK, Martin holds a B.Eng. in Electrical and Electronic Engineering from Coventry University (formerly known as Coventry Polytechnic).

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